H3C S6216 Series 48x10G NanoSec FPGA Financial Ultra-Low Latency Ethernet Switches

High-Density 10G Ports

• The S6216&S6116 series ultra-low latency switches support a maximum of 48 SFP+ ports at 10G speeds, with S6116-48X ports being autosensing for 1G/10G rates. The S6216&S6116 series switches meet the ultra-low latency and high connectivity requirements of strategy machines in high-frequency trading scenarios for brokers, funds, exchanges, futures, and private equity.

Layer 1 Ultra-Low Latency Capability

• The S6116 series: The maximum forwarding delay between any two ports on the S6116-48X ultra-low latency switch is within 4ns, with a minimum reaching 1.5ns.

• Packet size has no impact on forwarding delay: Test results show that forwarding delays are essentially consistent across different packet sizes ranging from 64 to 9216 bytes.

• Utilizing industry-leading ultra-low latency components and technologies, the switches achieve ultra-low latency forwarding between ports; signal detection technology ensures reliable signal transmission and anomaly detection.

• The S6116-48X switch supports bidirectional point-to-point links via a Patch Panel, enabling ultra-fast point-to-point data transmission; it supports Fan out for 1:N mapping links to achieve traffic replication, supports Tapping for traffic mirroring, and also supports port traffic statistics and port status UP/DOWN reporting.

• Configuration mapping can appoint a destination port in the source port view or configure a appointed source port in the destination port view, and can also be configured using the global connection-interface command for 1:1 Patch Panel mapping, allowing for flexible configuration.

• Supports port statistics: Utilizing industry-leading chip technology, it implements detailed L1+ port packet statistics, including received, sent, and packet types.

Built-in Industry-Leading FPGA Chip

• The S6116 series: The S6116-48X-M ultra-low latency switch features a built-in industry-leading FPGA chip, offering L1.5 layer ultra-low latency forwarding performance, with a minimum of 35ns.

• The S6216 series: Both the S6216-48X and S6216-48X-G ultra-low latency switches are equipped with industry-leading FPGA chips, providing a rich set of L1.5 Mux modes and supporting extensive Layer 2 and Layer 3 switch characteristics, with delays of 117~152 ns in Normal mode and 95~130 ns in Low-latency mode.

• Packet size has no impact on forwarding delay: Test results indicate that forwarding delays remain consistent across varying packet sizes from 64 to 9216 bytes.

• The S6216 and S6116 series switches support N:1 link multiplexing, utilizing FPGA for scheduling functions, and possess both Multiplexing and Demultiplexing characteristics. They support logical scheduling functions and N:1 multiplexing, ensuring ACK packets reach the designated server when used with filters.

FastMux

• The S6216 series and S6116-48X-M ultra-low latency switches support FastMux, a mode designed specifically for ultra-low latency applications, where downstream traffic is executed via L1 layer broadcasting (minimum latency of 1.5ns) and multiplexing is achieved by FPGA (minimum latency of 35ns). It supports 4 groups of Mux, allowing for dynamic adjustment of corresponding ports as needed.

• The latency of each Mux group is between 35ns and 45ns, based on the actual configured port latency.

• Downstream L1-level latency can be achieved: Downstream traffic does not pass through the FPGA and directly performs L1 Fan out, with a minimum latency of 1.5ns.

SecurityMux Enhance

• The S6216 series and S6116-48X-M ultra-low latency switches support SecurityMux Enhance, a mode designed for secure data forwarding, supporting L1.5 N:1 multiplexing, FPGA scheduling functions, and demultiplexing with ACL filtering. It can achieve a maximum capability of 46:2 Mux, with latencies ranging from 59ns to 76ns.

• Demux latency is between 59ns and 76ns; the specific data flow for forwarding is regulated through ACL control, with latencies ranging from 72ns to 109ns. ACL can be flexibly defined by the 5-tuple (source IP address, source port, destination IP address, destination port, protocol number), and currently, one outgoing interface supports 4 ACLs, with Packet-Filter simplifying ACL configuration.

Mutil-SecurityMux

• The S6216 series and S6116-48X-M ultra-low latency switches support Multi-SecurityMux, a mode designed for secure data forwarding, supporting L1.5 N:1 multiplexing, FPGA scheduling functions, and demultiplexing with ACL filtering. It can be configured with four groups of Mux, allowing for dynamic adjustment of corresponding ports as needed, and features two mirroring aggregation ports.

• Demux latency is between 59ns and 76ns; through ACL control, the specific data flow for forwarding is regulated, with latencies ranging from 72ns to 109ns. ACL can be flexibly defined by the 5-tuple (source IP address, source port, destination IP address, destination port, protocol number), and currently, one outgoing interface supports 4 ACLs, with Packet-Filter simplifying ACL configuration.

Mirroring Aggregation (Tapping Aggregation)

• The S6216 series and S6116-48X-M ultra-low latency switches support mirroring aggregation (Tapping Aggregation) mode, timestamping packet data from multiple ports and aggregating it into a single data flow for forwarding and backup, achieving industry-leading timestamp precision of approximately 200ps.

• In mirroring aggregation mode, it supports 4 mirroring aggregation output ports, allowing for load sharing.

Large Buffer (LargeBufferFlex-Mux)

• The S6216 series and S6116-48X-M ultra-low latency switches support large buffer mode, primarily used for multi-channel market data aggregation scenarios, capable of handling traffic surges during market openings, with latencies of 59-80ns.

• In large buffer mode, switch ports can be divided into six groups, with a maximum configuration of 8:40 (8 market data input ports connected to 40 output ports). The overall system's maximum buffer is 18M, with the first three groups configured with 6M each, dynamically adjusting the buffer for each additional group.

Layer 2/Layer 3 Functions

• The S6216 series ultra-low latency switches support L2/L3 functional modes, offering rich Layer 2 and Layer 3 characteristics, with latencies of 117~152ns in Normal mode and 95~130ns in Low-latency mode.

• Layer 2 characteristics: Supports port aggregation functions, with a maximum of 4 aggregation groups, each group containing up to 8 member ports, suitable for connections between switches or between switches and high-speed servers, ensuring that business packets maintain order; supports VLAN, PVLAN, Layer 2 multicast IGMP Snooping, and ACL, allowing for isolation of different client strategy machines and mutual access among the same client strategy machines.

• Layer 3 characteristics: Supports a variety of Layer 3 protocols, such as OSPF, BGP4, RIP, ARP Proxy, VRRP; supports Layer 3 multicast protocols like PIM and IGMP.

High-Precision Clock

• The S6216 series and S6116-48X-M ultra-low latency switches feature a board that supports OCXO high-precision temperature-controlled crystal oscillators, ensuring the system can provide stable high-precision clocking without an external clock source. To deliver high-precision clock functionality, the hardware incorporates various clock interface designs, working in conjunction with the internal OCXO to provide ps-level timestamp functionality, ensuring the accuracy of capture time and the correctness of data analysis, thus fulfilling the needs for application performance tracking, security, and forensics.

• The S6216 series and S6116-48X-M ultra-low latency switches support three external clock synchronization methods, providing users with flexible clock synchronization networking options:

1） Supports GPS clock input interfaces, capable of tracking GPS or BeiDou satellites to provide high-precision timing for the system.

2） Supports 1PPS input/output interfaces, which can receive high-precision clock input signals from upstream devices and provide clock output to downstream devices.

3） Supports PTP+SyncE clock protocols, enabling high-precision clock synchronization via the management Ethernet port.

Programmable Capability (Second FPGA)

• The H3C S6116-48X-M provides a second FPGA card that can load customer-designed application programs. Users can write FPGA-based applications to implement electronic trading algorithms, trading risk control checks, and other functions, with applications running on the FPGA enjoying significant latency optimization.

Excellent Management Capabilities

• The S6216&S6116 series switches support a rich set of management interfaces: 1 Console, 1 USB port, and 1 Gigabit Ethernet out-of-band management port.

• They support SNMPv1/v2/v3 (Simple Network Management Protocol), compatible with industry-standard network management platforms and the Intelligent Management Center (iMC). They support CLI command line, TELNET, FTP, and encryption methods such as SSH2.0, enhancing management security.

Flexible orientation selection for airflow

• The S6216&S6116 series ultra-low latency switches can achieve different airflow directions (either power side outflow or port side outflow) by selecting different fan trays, better aligning with the airflow design of the customer's data center.

Hardware Specification

Software Specification